Union Minister Ashwini Vaishnaw outlines six pillars of the Semicon 2.0 Scheme, providing fiscal and infrastructure support across the semiconductor value chain.
On August 31, 2026, Shri Ashwini Vaishnaw, Union Minister for Electronics and Information Technology, Railways and Information & Broadcasting, addressed the media and outlined the Government’s vision for strengthening India’s semiconductor design and manufacturing capabilities. The announcement marked a significant step towards this goal with the issuance of notifications for all six pillars of the Semicon 2.0 Scheme.
The scheme aims to provide fiscal and infrastructure support across the semiconductor value chain, including chip design, fabrication, packaging, equipment, materials, research and development, and talent development. The scheme is expected to improve India’s semiconductor supply-chain resilience and establish technological leadership in critical sectors.
The six pillars under Semicon 2.0 are:
• Pillar 1 – Design: This pillar includes categories for designing Semiconductor IPs, Chips, System-on-Chips (SoCs), and Modules for National Importance and Strategic Priorities; Design of Semiconductor IPs, Chips and SoCs for the Commercial Sector; and Deployment-Linked Incentive (DLI) for Semiconductor IPs/Chips/SoCs for deployment.
• Pillar 2 – Machines and Materials: This pillar focuses on the semiconductor manufacturing ecosystem.
• Pillar 3 – Setting up more Fabs: This pillar covers categories such as Silicon Semiconductor Wafer Fabs; Compound Semiconductors/Photonics/Sensors (including MEMS) Fab/Discrete Semiconductors Fab; and Display Fabs.
• Pillar 4 – Further strengthening the ATMP/OSAT industry: This pillar includes the category of Semiconductor Assembly, Testing, Marking and Packaging (ATMP) / Outsourced Semiconductor Assembly and Test (OSAT) Facility.
• Pillar 5 – Research and Development: This pillar focuses on research for advanced semiconductor technologies.
• Pillar 6 – Talent Development: This pillar focuses on talent development.
During the event, Shri Vaishnaw stated that India had achieved its target of developing 85,000 semiconductor engineers over a period of 10 years in just four years. He also set a new target of developing one lakh more engineers and estimated that close to 10% of the global semiconductor industry’s market is expected to be in India by the coming years.
Source:
Press Information Bureau
